发明申请
US20050242866A1 Programmable logic device having an embedded differential clock tree
有权
具有嵌入式差分时钟树的可编程逻辑器件
- 专利标题： Programmable logic device having an embedded differential clock tree
- 专利标题（中）： 具有嵌入式差分时钟树的可编程逻辑器件
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申请号： US10837009申请日： 2004-04-30
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公开(公告)号： US20050242866A1公开(公告)日： 2005-11-03
- 发明人: Vasisht Vadi , Steven Young , Atul Ghia , Adebabay Bekele , Suresh Menon
- 申请人： Vasisht Vadi , Steven Young , Atul Ghia , Adebabay Bekele , Suresh Menon
- 申请人地址： US CA San Jose 95124
- 专利权人： Xilinx, Inc.
- 当前专利权人： Xilinx, Inc.
- 当前专利权人地址： US CA San Jose 95124
- 主分类号： G06F1/10
- IPC分类号： G06F1/10 ; H03F3/45 ; H03K5/15 ; H03K19/177
摘要：
A clock distribution network having: a backbone clock signal line configured to provide a differential clock signal; multiple branches coupled to the backbone clock signal line for distributing the differential clock signal to multiple programmable function elements; a first leaf node coupled to a first branch, where the first leaf node is configured to provide the differential clock signal to a first programmable function element; and a second leaf node coupled to a second branch, where the second leaf node is configured to provide a single ended clock signal derived from the differential clock signal to a second programmable function element.
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