发明申请
- 专利标题: Semiconductor package and method for fabricating the same
- 专利标题(中): 半导体封装及其制造方法
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申请号: US10972200申请日: 2004-10-22
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公开(公告)号: US20050253284A1公开(公告)日: 2005-11-17
- 发明人: Yu-Po Wang , Chien-Ping Huang , Cheng-Hsu Hsiao
- 申请人: Yu-Po Wang , Chien-Ping Huang , Cheng-Hsu Hsiao
- 申请人地址: TW Taichung Hsien
- 专利权人: Siliconware Precision Industries Co., Ltd.
- 当前专利权人: Siliconware Precision Industries Co., Ltd.
- 当前专利权人地址: TW Taichung Hsien
- 优先权: TW093113297 20040512
- 主分类号: H01L21/56
- IPC分类号: H01L21/56 ; H01L21/60 ; H01L23/13 ; H01L23/28 ; H01L23/31 ; H01L23/498
摘要:
A semiconductor package and a method for fabricating the same are proposed. A substrate having a first circuit layer, a second circuit layer, and a core layer formed between the first and second circuit layers is provided. At least one second opening is formed on the second circuit layer. At least one first opening is formed on the first circuit layer corresponding to the second opening. A plurality of finger holes corresponding to bond fingers on the first circuit layer are formed in the core layer. A through opening is formed in the core layer and communicates with the first and second openings. At least one chip is mounted on the first circuit layer and covers the first opening, with its active surface being exposed to the first opening. An encapsulant is formed to fill the first and second openings and the through opening and encapsulate the chip.
公开/授权文献
- US07205642B2 Semiconductor package and method for fabricating the same 公开/授权日:2007-04-17
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