发明申请
- 专利标题: Versatile system for limiting electric field degradation of semiconductor structures
- 专利标题(中): 用于限制半导体结构电场退化的通用系统
-
申请号: US11180149申请日: 2005-07-13
-
公开(公告)号: US20050260858A1公开(公告)日: 2005-11-24
- 发明人: PR Chidambaram , Greg Baldwin
- 申请人: PR Chidambaram , Greg Baldwin
- 主分类号: H01L21/302
- IPC分类号: H01L21/302 ; H01L23/62 ; H01L29/06 ; H01L29/08 ; H01L29/78
摘要:
The present invention provides a system for limiting degradation of a first semiconductor structure (304) caused by an electric field (314), generated from within the semiconductor substrate (302) by high voltage on a second semiconductor structure (310). A semiconductor device (300) is adapted to reduce the effective magnitude of the field—as realized at structure 304—to some fractional component (320), or to render the angle (322)—at which the field approaches the first structure through a first substrate region (306)—acute. Certain embodiments of the present invention provide for: lateral recession of the first semiconductor structure to abut an isolation structure (312), which is disposed between the second semiconductor structure and the first substrate region; lateral recession of the first semiconductor structure from the isolation structure, so as to form a moat therebetween; and a counter-doped region (316) within the first substrate region.
公开/授权文献
信息查询
IPC分类: