发明申请
US20050275658A1 Information processing apparatus with a cache memory and information processing method
有权
具有高速缓冲存储器和信息处理方法的信息处理装置
- 专利标题: Information processing apparatus with a cache memory and information processing method
- 专利标题(中): 具有高速缓冲存储器和信息处理方法的信息处理装置
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申请号: US11141700申请日: 2005-05-31
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公开(公告)号: US20050275658A1公开(公告)日: 2005-12-15
- 发明人: Nobuo Sasaki , Takeshi Yamazaki , Atsushi Kunimatsu , Hideki Yasukawa
- 申请人: Nobuo Sasaki , Takeshi Yamazaki , Atsushi Kunimatsu , Hideki Yasukawa
- 优先权: JP2004-162636 20040531
- 主分类号: G06F12/08
- IPC分类号: G06F12/08 ; G06F12/00 ; G09G5/36
摘要:
A secondary texture cache is used commonly by a plurality of texture units, and stores part of texture data in a main memory. A cache controlling CPU controls a refill operation from the main memory to the secondary texture cache in accordance with cache misses of the plurality of texture units, so as to suppress occurrence of thrashing in the secondary texture cache. The cache controlling CPU suppresses occurrence of the refill operation when the plurality of operating units access an identical memory address with a predetermined time difference.
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