发明申请
- 专利标题: Combined matching and filter circuit
- 专利标题(中): 组合匹配和滤波电路
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申请号: US10872947申请日: 2004-06-21
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公开(公告)号: US20050282503A1公开(公告)日: 2005-12-22
- 发明人: Peter Onno , Rajanish , Nitin Jain , Christopher Weigand
- 申请人: Peter Onno , Rajanish , Nitin Jain , Christopher Weigand
- 申请人地址: US MA Lowell
- 专利权人: M/A-Com, Inc.
- 当前专利权人: M/A-Com, Inc.
- 当前专利权人地址: US MA Lowell
- 主分类号: H03H2/00
- IPC分类号: H03H2/00 ; H03H7/01 ; H03H7/09 ; H03H7/38 ; H04B1/00
摘要:
A combined matching and harmonic rejection circuit with increased harmonic rejection provided by a split resonance for one or more of the capacitive or inductive elements of the circuit. At a fundamental frequency, the circuit comprises an inductive series arm with capacitive shunt arms. The capacitance of a shunt arm may be provided by two or more parallel paths, each having a capacitor and an inductor in series so that, in addition to providing the effective capacitance necessary for impedance matching at the fundamental frequency, two separate harmonics represented by the series resonances of the parallel paths are rejected. In this manner, an extra null in the circuit's stop-band may be achieved using the same number of shunt elements necessary to achieve impedance matching at the fundamental frequency.
公开/授权文献
- US07660562B2 Combined matching and filter circuit 公开/授权日:2010-02-09
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