A procedure is provided for programming a DMA controller of a system on a chip that includes a CPU, an MMU, a DMA controller including source, destination, and size registers, and entities that are each identified by a physical address and addressable by applying that physical address to the address bus. In response to a first dedicated instruction of a user program, the virtual address is translated into a corresponding physical address, the corresponding physical address is applied to the address bus, a signal having a first value is delivered to the DMA controller, and a signal having a second value is delivered to the entities. When the signal delivered to the DMA controller has the first value, the source register or the destination register of the DMA controller is selected and the corresponding physical address on the address bus is stored in the selected register.