- 专利标题: Linearized fractional-N synthesizer having a gated offset
-
申请号: US11222632申请日: 2005-09-09
-
公开(公告)号: US20060035597A1公开(公告)日: 2006-02-16
- 发明人: Tsung-Hsien Lin , Hung-Ming Chien
- 申请人: Tsung-Hsien Lin , Hung-Ming Chien
- 主分类号: H04B1/40
- IPC分类号: H04B1/40 ; H04B7/00
摘要:
A linearized oscillation synthesizer includes a phase and frequency detection module, charge pump circuit, low pass filter, voltage control oscillator, and a feedback module. The phase and frequency detection module is operably coupled to produce a charge-up signal, a charge-down signal, and an off signal based on phase and/or frequency differences between a reference oscillation and a feedback oscillation. The reference oscillation is generated by a clock source such as a crystal oscillator while the divider module generates the feedback oscillation by dividing the output oscillation by a divider value. The charge pump circuit produces a positive current in response to the charge-up signal, a negative current in response to the charge-down signal and also produces a non-zero offset current. The non-zero offset current shifts the steady state operating condition, and other operating conditions, of the charge pump into a linear region of charge pump performance curve.
公开/授权文献
- US07289782B2 Linearized fractional-N synthesizer having a gated offset 公开/授权日:2007-10-30
信息查询