发明申请
- 专利标题: Thin film transistor having an etching protection film and manufacturing method thereof
- 专利标题(中): 具有蚀刻保护膜的薄膜晶体管及其制造方法
-
申请号: US11219171申请日: 2005-09-01
-
公开(公告)号: US20060043447A1公开(公告)日: 2006-03-02
- 发明人: Hiromitsu Ishii , Hitoshi Hokari , Motohiko Yoshida , Ikuhiro Yamaguchi
- 申请人: Hiromitsu Ishii , Hitoshi Hokari , Motohiko Yoshida , Ikuhiro Yamaguchi
- 申请人地址: JP Tokyo
- 专利权人: CASIO COMPUTER CO., LTD.
- 当前专利权人: CASIO COMPUTER CO., LTD.
- 当前专利权人地址: JP Tokyo
- 优先权: JP2004-255307 20040902; JP2004-378476 20041228
- 主分类号: H01L29/94
- IPC分类号: H01L29/94
摘要:
A thin film transistor of the present invention includes a semiconductor thin film (8); a gate insulating film (7) formed on one surface of the semiconductor thin film (8); a gate electrode (6) formed to be opposite to the semiconductor thin film (8) through the gate insulating film (7); a source electrode (15) and a drain electrode (16) electrically connected to the semiconductor thin film (8); a source region; a drain region; and a channel region. The thin film transistor further includes an insulating film (9) formed on a peripheral portion corresponding to at least the source region and the drain region of the semiconductor thin film (8), and having a contact hole (10, 11) through which at least a part of each of the source region and the drain region is exposed wherein the source electrode (15) and the drain electrode (16) are connected to the semiconductor thin film (8) through the contact hole (10, 11).
公开/授权文献
信息查询
IPC分类: