发明申请
- 专利标题： Integrated barrier and seed layer for copper interconnect technology
- 专利标题（中）： 铜互连技术的集成屏障和种子层
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申请号： US10945777申请日： 2004-09-20
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公开(公告)号： US20060063375A1公开(公告)日： 2006-03-23
- 发明人: Sey-Shing Sun , Byung-Sung Kwak , Peter Burke
- 申请人： Sey-Shing Sun , Byung-Sung Kwak , Peter Burke
- 申请人地址： US CA Milpitas
- 专利权人： LSI Logic Corporation
- 当前专利权人： LSI Logic Corporation
- 当前专利权人地址： US CA Milpitas
- 主分类号： H01L21/4763
- IPC分类号： H01L21/4763
摘要：
An integrated barrier and seed layer that is useful for creating conductive pathways in semiconductor devices. The barrier portion of the integrated layer prevents diffusion of the conductive material into the underlying dielectric substrate while the seed portion provides an appropriate foundation upon which to deposit the conductive material. The barrier portion of the integrated layer is formed of a metal nitride, while the seed portion is formed of ruthenium or a ruthenium alloy. The metal nitride forms an effective barrier layer while the ruthenium or ruthenium alloy forms an effective seed layer for a metal such as copper. In some embodiments, the integrated layer is formed in a way so that its composition changes gradually from one region to the next.