发明申请
- 专利标题: Methods for creating electrophoretically insulated vias in semiconductive substrates
- 专利标题(中): 在半导体衬底中形成电泳绝缘通孔的方法
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申请号: US11266837申请日: 2005-11-04
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公开(公告)号: US20060063377A1公开(公告)日: 2006-03-23
- 发明人: Warren Farnworth , Dale Collins , Steven McDonald
- 申请人: Warren Farnworth , Dale Collins , Steven McDonald
- 主分类号: H01L21/4763
- IPC分类号: H01L21/4763
摘要:
Methods for creating lined vias in semiconductor substrates. Using electrophoretic deposition techniques, micelles of a lining material are deposited on the wall of the via, reacting with the surface of the wall until the entire wall is covered by the lining material. The lining material is then fixed in place to form a layer lining the via. The lined via may then be filled with a desired material. For example, a via lined with an insulative material may be filled with a material such as copper to create an insulated conductive via through the substrate.
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