Invention Application
- Patent Title: Method of manufacturing a semiconductor device
- Patent Title (中): 制造半导体器件的方法
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Application No.: US11243397Application Date: 2005-10-03
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Publication No.: US20060073670A1Publication Date: 2006-04-06
- Inventor: Yong-Kug Bae , Kwang-Sub Yoon , Young-Wook Park , Jung-Hyeon Lee
- Applicant: Yong-Kug Bae , Kwang-Sub Yoon , Young-Wook Park , Jung-Hyeon Lee
- Priority: KR2004-78162 20041001
- Main IPC: H01L21/20
- IPC: H01L21/20 ; H01L21/4763 ; H01L21/8242

Abstract:
In one embodiment, first and second multi-layer pattern structures are formed over first and second regions of a substrate, respectively. The first and second multi-layer pattern structures include first and second support layer patterns, respectively. The first and second multi-layer pattern structures define first and second openings, respectively. The first and second openings partially expose a portion of the first region and a portion of the second region, respectively. First and second liner patterns are formed on an inner face of the first opening and an inner face of the second opening, respectively. A first etching process is performed on the first multi-layer pattern structure until the first support layer pattern is removed. A second etching process is performed to remove the second multi-layer pattern structure except for the second support layer pattern.
Information query
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