利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

8456 条记录 (耗时 0.024 秒)

    Transistor device with a field electrode that includes two layers
    1.
    发明授权
    Transistor device with a field electrode that includes two layers 有权

    公开(公告)号：US11581409B2

    公开(公告)日：2023-02-14

    申请号：US17176494

    申请日：2021-02-16

    申请人： Infineon Technologies Austria AG

    发明人： Thomas Feil

    IPC分类号： H01L27/108 ,  H01L21/8242 ,  H01L29/40 ,  H01L29/78 ,  H01L29/66 ,  H01L29/739 ,  H01L21/283 ,  H01L29/43 ,  H01L29/423

    摘要： Disclosed is a transistor device which includes a semiconductor body having a first surface, a source region, a drift region, a body region being arranged between the source region and the drift region, a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric, and a field electrode adjacent the drift region and dielectrically insulated from the drift region by a field electrode dielectric, wherein the field electrode comprises a first layer and a second layer, wherein the first layer has a lower electrical resistance than the second layer, wherein a portion of the second layer is disposed above and directly contacts a portion of the first layer.

    Non-volatile random access memory (NVRAM)
    2.
    发明授权
    Non-volatile random access memory (NVRAM) 有权

    公开(公告)号：US11205680B2

    公开(公告)日：2021-12-21

    申请号：US16558818

    申请日：2019-09-03

    申请人： NXP USA, INC.

    发明人： Anirban Roy

    IPC分类号： H01L27/108 ,  H01L21/8242 ,  H01L21/20 ,  H01L27/24 ,  H01L27/22 ,  H01L43/12 ,  H01L43/02 ,  H01L45/00 ,  H01L21/768 ,  H01L29/94 ,  H01L27/06 ,  H01L29/40

    摘要： A semiconductor device and methods for making the same are disclosed. The device may include: a first transistor structure; a second transistor structure; a capacitor structure comprising a trench in the substrate between the first and second transistor structures, the capacitor structure further comprising a doped layer over the substrate, a dielectric layer over the doped layer, and a conductive fill material over the dielectric layer; a first conductive contact from the first transistor structure to a first bit line; a second conductive contact from the second transistor to a non-volatile memory element; and a third conductive contact from the non-volatile memory element to a second bit line.

    Semiconductor one-time programmable memory for nanometer CMOS
    3.
    发明授权
    Semiconductor one-time programmable memory for nanometer CMOS 有权

    公开(公告)号：US11152382B2

    公开(公告)日：2021-10-19

    申请号：US16920717

    申请日：2020-07-05

    申请人： Donghyuk Ju

    发明人： Donghyuk Ju

    IPC分类号： H01L27/108 ,  H01L21/8242 ,  H01L27/112 ,  H01L29/423 ,  H01L27/092 ,  H01L29/06 ,  H01L29/80

    摘要： An antifuse OTP memory bit cell comprises a gate electrode, a gate dielectric and source/drain diffusions formed in an active area of a semiconductor substrate. The source/drain diffusions are connected under the gate electrode by lateral diffusion but they don't have to be. If connected, a rectifying contact is created in a programmed bit cell. If unconnected, a rectifying contact or a non-rectifying contact is created in a programmed bit cell. Whether connected or unconnected, the device operates as an OTP memory bit cell without an access transistor.

    Semiconductor device and memory device including the semiconductor device
    5.
    发明授权
    Semiconductor device and memory device including the semiconductor device 审中-公开

    公开(公告)号：US10672771B2

    公开(公告)日：2020-06-02

    申请号：US16175174

    申请日：2018-10-30

    申请人： Semiconductor Energy Laboratory Co., Ltd.

    发明人： Fumika Akasawa ,  Hiroki Inoue ,  Takashi Nakagawa ,  Yoshiyuki Kurokawa

    IPC分类号： H01L27/108 ,  H01L21/8242

    摘要： To provide a semiconductor device that can reduce power consumption and retain data for a long time and a memory device including the semiconductor device. The semiconductor device includes a word line divider, a memory cell, a first wiring, and a second wiring. The word line divider is electrically connected to the first wiring and the second wiring. The memory cell includes a first transistor with a dual-gate structure. A first gate of the first transistor is electrically connected to the first wiring, and a second gate of the first transistor is electrically connected to the second wiring. The word line divider supplies a high-level potential or a low-level potential to the first wiring and supplies a predetermined potential to the second wiring, whereby a threshold voltage of the first transistor is changed. With such a configuration, a semiconductor device that can reduce power consumption and retain data for a long time is driven.