- 专利标题: Electronic circuit structure, power supply apparatus, power supply system, and electronic apparatus
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申请号: US11260210申请日: 2005-10-28
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公开(公告)号: US20060092599A1公开(公告)日: 2006-05-04
- 发明人: Hideho Yamamura , Naoki Maru , Kazunori Nakajima , Koji Nisisu , Shigeo Oomae
- 申请人: Hideho Yamamura , Naoki Maru , Kazunori Nakajima , Koji Nisisu , Shigeo Oomae
- 优先权: JP2005-013473 20050121; JP2004-314996 20041029
- 主分类号: H02B1/20
- IPC分类号: H02B1/20
摘要:
This invention prevents a deterioration of efficiency of a power supply apparatus due to a semiconductor power supply voltage drop, prevents an increase in wasted power, and prevents erroneous operations due to feeder wire voltage drop. In the mounting structure of electronic circuits having a plurality of busbars as current paths on a printed circuit board, the plurality of busbars have almost parallel portions spaced a predetermined distance apart; a span of the parallel portions of the plurality of busbars is greater than the predetermined distance; and in the parallel portions of the plurality of busbars, the plurality of busbars are connected by a wiring pattern. In the switching power supply apparatus built on a printed circuit board, with its output voltage of less than 2 V and its output current of more than 100 A, a means is provided for making the power efficiency higher than 70%.
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