发明申请
- 专利标题： Method of making a semiconductor device by balancing shallow trench isolation stress and optical proximity effects
- 专利标题（中）： 通过平衡浅沟槽隔离应力和光学邻近效应制造半导体器件的方法
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申请号： US10992031申请日： 2004-11-18
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公开(公告)号： US20060107243A1公开(公告)日： 2006-05-18
- 发明人: James Chlipala , Shahriar Moinian
- 申请人： James Chlipala , Shahriar Moinian
- 申请人地址： US PA Allentown 18109
- 专利权人： Agere Systems Inc.
- 当前专利权人： Agere Systems Inc.
- 当前专利权人地址： US PA Allentown 18109
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
The present invention provides a method for manufacturing a semiconductor device, comprising: determining an isolation structure stress effect of a first semiconductor device, determining an optical proximity effect of a second semiconductor device, selecting a modeling design parameter such that the isolation structure stress effect is offset against the optical proximity effect on a fabrication model, and using the selected design parameter to construct a third semiconductor device.
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