发明申请
US20060109714A1 Circuit for indicating termination of scan of bits to be programmed in nonvolatile semiconductor memory device 有权
用于指示停止在非易失性半导体存储器件中编程的位的扫描的电路

  • 专利标题: Circuit for indicating termination of scan of bits to be programmed in nonvolatile semiconductor memory device
  • 专利标题(中): 用于指示停止在非易失性半导体存储器件中编程的位的扫描的电路
  • 申请号: US11206586
    申请日: 2005-08-17
  • 公开(公告)号: US20060109714A1
    公开(公告)日: 2006-05-25
  • 发明人: Jae-Woo Im
  • 申请人: Jae-Woo Im
  • 优先权: KR2004-95595 20041122
  • 主分类号: G11C16/04
  • IPC分类号: G11C16/04
Circuit for indicating termination of scan of bits to be programmed in nonvolatile semiconductor memory device
摘要:
A circuit for indicating termination of scan of bits to be programmed in a nonvolatile semiconductor memory device includes a counting unit, a set bit number provision unit and a comparison unit. The counting unit counts the predetermined number of bits to be programmed, and provides a group of counting bit signals indicating the number of bits to be programmed. The set bit number provision unit provides a group of set bit signals indicating the number of set bits. The number of set bits can be externally controlled. The comparison unit compares the group of counting bit signals with the group of set bit signals and ultimately provides a scan termination signal used to control programming for the memory array. The logic level of the scan termination signal is changed when the number of bits to be programmed attains the number of set bits. Accordingly, a designer or user of a nonvolatile semiconductor memory device can adjust the number of bits to be simultaneously programmed, and the time required for a complete program operation can be shortened.
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