It is possible to implement a Power Line Communication (PLC) PHY utilizing a digital direct drive output stage that converts the digital output waveform into an analog signal on the power line through pulse width modulation at a very high frequency. Utilizing PWM circuitry instead of a DAC can reduce the silicon real estate size of the PHY, and the quantization noise of the output signal, as well as improve the input to output efficiency. The power dissipation of the device can also be reduced by the elimination of the linear amplification mode of the output driver stage.