- 专利标题： Test circuit and method for multilevel cell flash memory
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申请号： US10991702申请日： 2004-11-17
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公开(公告)号： US20060123280A1公开(公告)日： 2006-06-08
- 发明人: Hieu Tran , Anh Ly , Sang Nguyen , Vishal Sarin , Hung Nguyen , William Saiki , Loc Hoang
- 申请人： Hieu Tran , Anh Ly , Sang Nguyen , Vishal Sarin , Hung Nguyen , William Saiki , Loc Hoang
- 主分类号： G11C29/00
- IPC分类号： G11C29/00
摘要：
A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.
公开/授权文献
- US07325177B2 Test circuit and method for multilevel cell flash memory 公开/授权日：2008-01-29