发明申请
US20060154441A1 Method for forming a buried diffusion layer with reducing topography in a surface of a semiconductor substrate
有权
用于在半导体衬底的表面中形成具有减小的形貌的掩埋扩散层的方法
- 专利标题: Method for forming a buried diffusion layer with reducing topography in a surface of a semiconductor substrate
- 专利标题(中): 用于在半导体衬底的表面中形成具有减小的形貌的掩埋扩散层的方法
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申请号: US11032045申请日: 2005-01-11
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公开(公告)号: US20060154441A1公开(公告)日: 2006-07-13
- 发明人: Cheng-Ming Yih , Huei-Huarng Chen , Hsuan-Ling Kao
- 申请人: Cheng-Ming Yih , Huei-Huarng Chen , Hsuan-Ling Kao
- 申请人地址: TW Hsin-Chu City
- 专利权人: MACRONIX INTERNATIONAL CO. LTD.
- 当前专利权人: MACRONIX INTERNATIONAL CO. LTD.
- 当前专利权人地址: TW Hsin-Chu City
- 主分类号: H01L21/76
- IPC分类号: H01L21/76
摘要:
A method for forming a buried diffusion layer with reducing topography in a surface of a semiconductor substrate is provided. A patterned first dielectric layer is formed on a semiconductor substrate for being used as a first hard mask. A thermal oxidation process is performed to form field oxides on the exposed potions of the semiconductor substrate. The patterned first dielectric layer is then removed. A second patterned dielectric layer is formed on the field oxides and the semiconductor substrate for being used as a second hard mask. An isotropic etching process is performed to etch the exposed portions of the field oxides and the semiconductor substrate. The patterned second dielectric layer and the underlying field oxides are removed to form a plurality of trenches on the surface of the semiconductor substrate. A buried diffusion layer is formed along surroundings of the trenches in the semiconductor substrate.
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