Invention Application
US20060154465A1 Method for fabricating interconnection line in semiconductor device
审中-公开
在半导体器件中制造互连线的方法
- Patent Title: Method for fabricating interconnection line in semiconductor device
- Patent Title (中): 在半导体器件中制造互连线的方法
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Application No.: US11330581Application Date: 2006-01-12
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Publication No.: US20060154465A1Publication Date: 2006-07-13
- Inventor: Bong-seok Suh , Sun-jung Lee , Hong-jae Shin , Soo-geun Lee
- Applicant: Bong-seok Suh , Sun-jung Lee , Hong-jae Shin , Soo-geun Lee
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Priority: KR10-2005-0034650 20050426
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/4763
![Method for fabricating interconnection line in semiconductor device](/abs-image/US/2006/07/13/US20060154465A1/abs.jpg.150x150.jpg)
Abstract:
Provided is a method for fabricating an interconnection line in a semiconductor device. The method includes forming a dielectric layer pattern including a region for forming the interconnection line on a semiconductor substrate, forming a diffusion barrier layer on the dielectric layer pattern, forming a first adhesion layer on the diffusion barrier layer, forming a seed layer on the first adhesion layer, forming a conductive layer to fill the region for forming the interconnection line, performing grain growth of the conductive layer by performing a first annealing process, planarizing the conductive layer to expose the top surface of the dielectric layer pattern, and forming an interface layer through reaction between the first adhesion layer and the conductive layer by performing a second annealing process at a temperature higher than that of the first annealing process.
Information query
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