A microprocessor simulation method, system, and program product built upon the underlying hardware design of the microprocessor. The method, system, and program product stops normal functions of a simulation testcase, starts the scan clocks, records a first “snap shot” of the scan ring data at this initial time. The hardware logic then rotates (shifts) the scan ring using the current scan data, and when the scan clock stops (where the stop of the scan clock is controlled based on the number of latches on the scan ring), another “snap shot” of scan ring data is taken. The “snap shots” are compared and if both of the “snap shots” are identical the functional scan is successful. But if the functional scan verification fails to rotate the scan chain correctly, that is, if some of the latches do not match in the two “snap shots,” it becomes necessary to locate the broken spot within the large number of scan latches.