发明申请
US20060170029A1 Novel process for erase improvement in a non-volatile memory device
有权
用于擦除非易失性存储器件中的擦除的新方法
- 专利标题: Novel process for erase improvement in a non-volatile memory device
- 专利标题(中): 用于擦除非易失性存储器件中的擦除的新方法
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申请号: US11045850申请日: 2005-01-28
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公开(公告)号: US20060170029A1公开(公告)日: 2006-08-03
- 发明人: Shih-Chang Liu , Chi-Hsin Lo , Shih-Chi Fu , Chia-Ta Hsieh , Wen-Ting Chu , Chia-Shiung Tsai
- 申请人: Shih-Chang Liu , Chi-Hsin Lo , Shih-Chi Fu , Chia-Ta Hsieh , Wen-Ting Chu , Chia-Shiung Tsai
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: H01L29/788
- IPC分类号: H01L29/788
摘要:
A method of making embedded non-volatile memory devices includes forming a first mask layer overlying a polycrystalline silicon layer in a cell region and a peripheral region on a semiconductor substrate wherein the first mask layer has a plurality of openings in the cell region. Portions of the polycrystalline silicon layer exposed in the plurality of openings can be oxidized to form a plurality of poly-oxide regions, and the first mask layer can then be removed. The polycrystalline silicon layer not covered by the plurality of poly-oxide regions can be etched to form a plurality of floating gates, wherein etching the polycrystalline silicon layer is accompanied by a sputtering. A dielectric layer can then be formed, as well as a second mask layer in both the cell region and the peripheral region. The second mask layer in the cell region is partially etched back after a photoresist layer is formed over the second mask layer in the peripheral region. The dielectric layer is partially etched to form multiple thicknesses of the dielectric layer. The second mask layer is removed and a plurality of control gates are formed partially overlying the plurality of floating gates in the cell region.
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