发明申请
US20060181941A1 Efficient method of test and soft repair of SRAM with redundancy 有权
SRAM冗余测试和软修复的高效方法

Efficient method of test and soft repair of SRAM with redundancy
摘要:
Memory array built in self testing utilizing including a simple data history table. The table is used to track failing locations observed during any level of assembly test of processor or logic semiconductor chips where the chips contain SRAM macros with redundant elements for failure relief.
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