- 专利标题: Noise suppression circuit, ASIC, navigation apparatus, communication circuit, and communication apparatus having the same
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申请号: US11411143申请日: 2006-04-26
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公开(公告)号: US20060197695A1公开(公告)日: 2006-09-07
- 发明人: Hideki Takeuchi , Masami Murakata , Masaaki Yamada , Reiko Nojima , Takashi Ishioka , Mutsunori Igarashi
- 申请人: Hideki Takeuchi , Masami Murakata , Masaaki Yamada , Reiko Nojima , Takashi Ishioka , Mutsunori Igarashi
- 专利权人: KABUSHIKI KAISHA TOSHIBA
- 当前专利权人: KABUSHIKI KAISHA TOSHIBA
- 优先权: JP9-237303 19970902; JP9-247202 19970911; JP10-079156 19980326
- 主分类号: H03M1/12
- IPC分类号: H03M1/12
摘要:
The present invention provides an noise suppression circuit comprises an internal circuit which has a high and a low level terminals. The low level terminal is connected to a low level power supply (GND) line. The noise suppression circuit further comprises a first transistor in which one main electrode is connected to the high level terminal of the circuit, a bypass capacitor connected between the other main electrode of the first transistor and the low level power supply line, and a second transistor connected between the other main electrode of the first transistor and a high level power supply (VDD) line. The first transistor is conductive when the internal circuit is active, and is not conductive when the internal circuit is inactive. The second transistor is not conductive when the internal circuit is active, and is conductive when the internal circuit is inactive. Moreover, a communication circuit for setting the number of data buses to be newly added to be less than two times a transmission on data, then encoding the data to be sent 80 as to make the numbers of “0” and “1” in the data to be sent through the data buses equal to each other and accordingly reducing the increase of the number of the data buses to a minimum and thereby suppressing the common phase power supply noise is provided. A communication apparatus comprising the communication circuit is also provided. Furthermore, the bypass capacitor C for noise suppression circuit is formed in an empty space in a ASIC. A polysilicon layer constituting one electrode of the bypass capacitor is formed in the substrate contact region formed between basic cells regularly arranged, each including a plurality of nMOS and pMOS transistors. This bypass capacitor C is connected between the high and the low level power supply lines to reduce the current running through the power supply line to suppress the EMI noise.
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