发明申请
US20060200615A1 Systems and methods for adaptively mapping an instruction cache
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用于自适应地映射指令高速缓存的系统和方法
- 专利标题： Systems and methods for adaptively mapping an instruction cache
- 专利标题（中）： 用于自适应地映射指令高速缓存的系统和方法
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申请号： US11070758申请日： 2005-03-02
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公开(公告)号： US20060200615A1公开(公告)日： 2006-09-07
- 发明人: Claude Basso , Jean Calvignac , Chih-jen Chang , Harm Hofstee , Jens Leenstra , Hans-Werner Tast , Fabrice Verplanken , Colin Verrilli
- 申请人： Claude Basso , Jean Calvignac , Chih-jen Chang , Harm Hofstee , Jens Leenstra , Hans-Werner Tast , Fabrice Verplanken , Colin Verrilli
- 主分类号： G06F12/08
- IPC分类号： G06F12/08 ; G06F12/00
摘要：
Systems and methods for adaptively mapping system memory address bits into an instruction tag and an index into the cache are disclosed. More particularly, hardware and software are disclosed for observing collisions that occur for a given mapping of system memory bits into a tag and an index. Based on the observations, an optimal mapping may be determined that minimizes collisions.
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