发明申请
US20060202870A1 Decoder of digital-to-analog converter 有权
数模转换器解码器

Decoder of digital-to-analog converter
摘要:
A decoder of a digital-to-analog converter is disclosed. In the present invention, the gamma voltage selection is controlled by a reduced number of NMOS and PMOS transistors according to the characteristic of the NMOS and PMOS transistor, such that the layout area of the switch array is reduced. Moreover, a N-type buried diffusion (BDN) layer and a P-type buried diffusion (BDP) layer are adopted to replace the contacts in the layout of conventional decoder, such that the layout can be simplified and the bump pad pitch thereof can be decreased.
公开/授权文献
信息查询
0/0