发明申请
US20060273378A1 BIDIRECTIONAL SPLIT GATE NAND FLASH MEMORY STRUCTURE AND ARRAY, METHOD OF PROGRAMMING, ERASING AND READING THEREOF, AND METHOD OF MANUFACTURING
有权
双向分割门NAND闪存存储器结构和阵列，编程，擦除和读取方法及其制造方法
- 专利标题： BIDIRECTIONAL SPLIT GATE NAND FLASH MEMORY STRUCTURE AND ARRAY, METHOD OF PROGRAMMING, ERASING AND READING THEREOF, AND METHOD OF MANUFACTURING
- 专利标题（中）： 双向分割门NAND闪存存储器结构和阵列，编程，擦除和读取方法及其制造方法
-
申请号： US11134557申请日： 2005-05-20
-
公开(公告)号： US20060273378A1公开(公告)日： 2006-12-07
- 发明人: Feng Gao , Ya-Fen Lin , John Cooksey , Changyuan Chen , Yuniarto Widjaja , Dana Lee
- 申请人： Feng Gao , Ya-Fen Lin , John Cooksey , Changyuan Chen , Yuniarto Widjaja , Dana Lee
- 主分类号： H01L29/792
- IPC分类号： H01L29/792
摘要：
A split gate NAND flash memory structure is formed on a semiconductor substrate of a first conductivity type. The NAND structure comprises a first region of a second conductivity type and a second region of the second conductivity type in the substrate, spaced apart from the first region, thereby defining a channel region therebetween. A plurality of floating gates are spaced apart from one another and each is insulated from the channel region. A plurality of control gates are spaced apart from one another, with each control gate insulated from the channel region. Each of the control gate is between a pair of floating gates and is capacitively coupled to the pair of floating gates. A plurality of select gates are spaced apart from one another, with each select gate insulated from the channel region. Each select gate is between a pair of floating gates.
公开/授权文献
信息查询
IPC分类:
