A claimed multiple mode switch includes an input signal interface for receiving first and second input signals and producing a combined input signal; a driving circuit for receiving the combined input signal and producing driving signals accordingly; a resistor mode circuit electrically connected to a first output of the driving circuit, to a first node, and to a second node for enabling the multiple mode switch to operate in variable resistor mode or in large resistor mode; a fully-on mode circuit electrically connected to the second input signal, the first output of the driving circuit, and the second node for enabling the multiple mode switch to operate in fully-on mode; and a power switch electrically connected to the first node, the second node, and a third node for controlling switching of the multiple mode switch between off mode, fully-on mode, and variable resistor mode or large resistor mode.