发明申请
US20060292784A1 Methods of Forming Integrated Circuit Devices Including Memory Cell Gates and High Voltage Transistor Gates Using Plasma Re-Oxidation
审中-公开
使用等离子体再氧化形成包括存储单元门和高压晶体管门的集成电路器件的方法
- 专利标题： Methods of Forming Integrated Circuit Devices Including Memory Cell Gates and High Voltage Transistor Gates Using Plasma Re-Oxidation
- 专利标题（中）： 使用等离子体再氧化形成包括存储单元门和高压晶体管门的集成电路器件的方法
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申请号： US11424995申请日： 2006-06-19
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公开(公告)号： US20060292784A1公开(公告)日： 2006-12-28
- 发明人: Woong Sohn , Gil-heyun Choi , Chang-won Lee , Byung-hee Kim , Tae-ho Cha
- 申请人： Woong Sohn , Gil-heyun Choi , Chang-won Lee , Byung-hee Kim , Tae-ho Cha
- 优先权： KR10-2005-0054566 20050623
- 主分类号： H01L21/8238
- IPC分类号： H01L21/8238
摘要：
A method of forming an integrated circuit device can include forming a plurality of stacked cell gates in a memory cell region of a semiconductor substrate and a plurality of high-voltage transistor gates in a peripheral circuit region of the semiconductor substrate. The semiconductor substrate including both the plurality of stacked cell gates and the plurality of high-voltage transistor gates is annealed and the annealed semiconductor substrate including both the plurality of stacked cell gates and the plurality of high-voltage transistor gates is plasma oxidized.
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