A semiconductor device including: a semiconductor layer including an element formation region and an isolation region provided around the element formation region; an element formed in the element formation region; an interlayer dielectric formed above the semiconductor layer; an electrode pad formed above the interlayer dielectric; a passivation layer formed above the electrode pad and having an opening which exposes at least part of the electrode pad; and a bump formed in the opening and having a rectangular planar shape having a short side and a long side, the bump at least partially covering the element when viewed from a top side, and the semiconductor layer positioned within a specific range inward and outward from a line extending vertically downward from the short side of the bump being a forbidden region.