发明申请
US20070047594A1 Combined hardware and software implementation of link capacity adjustment scheme (LCAS) in SONET (synchronous optical network) virtual concatenation (VCAT)
有权
在SONET（同步光网络）虚级联（VCAT）中组合硬件和软件实现链路容量调整方案（LCAS）
- 专利标题： Combined hardware and software implementation of link capacity adjustment scheme (LCAS) in SONET (synchronous optical network) virtual concatenation (VCAT)
- 专利标题（中）： 在SONET（同步光网络）虚级联（VCAT）中组合硬件和软件实现链路容量调整方案（LCAS）
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申请号： US11210135申请日： 2005-08-23
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公开(公告)号： US20070047594A1公开(公告)日： 2007-03-01
- 发明人: Rakesh Malik , Dev Mukherjee , Harsh Chilwal , Dinesh Gupta
- 申请人： Rakesh Malik , Dev Mukherjee , Harsh Chilwal , Dinesh Gupta
- 主分类号： H04L12/56
- IPC分类号： H04L12/56
摘要：
Combined hardware and software processing is applied in an end node of the network which includes mapping/demapping and deskewing. Most of the LCAS procedure is implemented in software so that it can be modified easily. Some of the procedure is implemented in hardware to meet stringent timing requirements. In particular, the handshaking protocol is implemented in software and the procedure for actually changing of the link capacity in response to the handshaking is implemented in hardware. The hardware and software communicate via a shared memory which includes a receive packet FIFO, receive control and status registers, a transmit packet FIFO, transmit control and status registers, and a transmit time slot interchange table.