Invention Application
US20070050608A1 Hardware-generated and historically-based execution optimization
审中-公开
硬件生成和基于历史的执行优化
- Patent Title: Hardware-generated and historically-based execution optimization
- Patent Title (中): 硬件生成和基于历史的执行优化
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Application No.: US11292323Application Date: 2005-11-30
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Publication No.: US20070050608A1Publication Date: 2007-03-01
- Inventor: Bran Ferren , W. Hillis , William Mangione-Smith , Nathan Myhrvold , Clarence Tegreene , Lowell Wood
- Applicant: Bran Ferren , W. Hillis , William Mangione-Smith , Nathan Myhrvold , Clarence Tegreene , Lowell Wood
- Assignee: Searete LLC, a limited liability corporatin of the State of Delaware
- Current Assignee: Searete LLC, a limited liability corporatin of the State of Delaware
- Main IPC: G06F9/44
- IPC: G06F9/44

Abstract:
Embodiments include a device, and a method. In an embodiment, a device includes a processor operable to execute an instruction set, a communications link exposed to an execution-optimization synthesizer and to the processor, and the execution-optimization synthesizer. The execution-optimization optimization synthesizer includes an execution-optimization synthesizer operable to collect data from the communications link that corresponds to an execution of at least one instruction of the instruction set, and generate an execution-optimization information utilizing the collected data from the communications link and corresponding to the execution of at least one instruction of the instruction set.
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