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    Programmable Hardware for Deep Packet Filtering
    1.
    发明申请
    Programmable Hardware for Deep Packet Filtering 有权
    深度包过滤可编程硬件

    公开(公告)号：US20080047008A1

    公开(公告)日：2008-02-21

    申请号：US11587292

    申请日：2005-04-19

    申请人： Young Cho ,  William Mangione-Smith

    发明人： Young Cho ,  William Mangione-Smith

    IPC分类号： G06F11/00

    CPC分类号： H04L63/0245 ,  H04L12/2854 ,  H04L63/145

    摘要： An improved deep packet filter system designed to optimize search of dynamic patterns for a high speed network traffic. The improved deep packet filter system is a hardware-based system with optimized logic area. One optimization technique is the sharing of common sub-logic in the hardware design to reduce the number of gates that are required. Another optimization technique is the use of a built-in memory to store portions of the pattern set, also resulting in a reduction of gates. The reduction of the logic area allows the deep packet filter system to be implemented onto a single field-programmable array chip.

    摘要翻译： 一种改进的深度包过滤系统，旨在优化高速网络流量的动态模式搜索。 改进的深度包过滤系统是一种基于硬件的系统，具有优化的逻辑区域。 一种优化技术是在硬件设计中共享公共子逻辑，以减少所需门数。 另一个优化技术是使用内置存储器来存储图案集的部分，也导致门的减少。 逻辑区域的减少允许将深度分组过滤器系统实现到单个现场可编程阵列芯片上。

    Responding to advertisement-adverse content or the like
    3.
    发明申请
    Responding to advertisement-adverse content or the like 审中-公开
    响应广告不利内容等

    公开(公告)号：US20070294091A1

    公开(公告)日：2007-12-20

    申请号：US11432762

    申请日：2006-05-10

    申请人： Alexander Cohen ,  Edward Jung ,  Royce Levien ,  Robert Lord ,  Mark Malamud ,  William Mangione-Smith ,  John Rinaldo ,  Clarence Tegreene

    发明人： Alexander Cohen ,  Edward Jung ,  Royce Levien ,  Robert Lord ,  Mark Malamud ,  William Mangione-Smith ,  John Rinaldo ,  Clarence Tegreene

    IPC分类号： G06Q10/00 ,  G07G1/14 ,  G06Q30/00

    CPC分类号： G06Q30/02 ,  G06Q30/0273 ,  G06Q30/0277

    摘要： A method and system are described for obtaining a relation between a visual display and an advertisement-adverse-content indication or for indicating a linkage between a local delivery of mobile-device content and a commercial purpose. The method and system may also relate to invoking circuitry for signaling whether to cause one or more cognitive symbols substantially to vanish from the visual display responsive to the obtained relation between the visual display and the advertisement-adverse-content indication, circuitry for responding locally to the indicated linkage between the local delivery of mobile-device content and the commercial purpose, or circuitry for signaling whether to transmit a message outside the visible-display zone responsive to the obtained relation between the visible-display zone and the advertisement-adverse-content indication.

    摘要翻译： 描述了用于获得视觉显示和广告 - 不利内容指示之间的关系或用于指示移动设备内容的本地传送与商业目的之间的关联的方法和系统。 所述方法和系统还可以涉及到响应于所获得的视觉显示和广告 - 不利内容指示之间的关系，用于发信号通知是否使一个或多个认知符号基本上从视觉显示消失的电路，用于本地响应的电路 所指示的移动设备内容的本地传送与商业目的之间的联系，或者响应于所获得的可见显示区与广告不利内容之间的关系，用于发信号通知是否在可见显示区之外传送消息的电路 指示。

    Adjusting a processor operating parameter based on a performance criterion
    6.
    发明申请
    Adjusting a processor operating parameter based on a performance criterion 有权
    基于性能标准调整处理器操作参数

    公开(公告)号：US20070050661A1

    公开(公告)日：2007-03-01

    申请号：US11364573

    申请日：2006-02-28

    申请人： Bran Ferren ,  W. Hillis ,  William Mangione-Smith ,  Nathan Myhrvold ,  Clarence Tegreene ,  Lowell Wood

    发明人： Bran Ferren ,  W. Hillis ,  William Mangione-Smith ,  Nathan Myhrvold ,  Clarence Tegreene ,  Lowell Wood

    IPC分类号： G06F11/00

    CPC分类号： G06F11/0793 ,  G06F11/0721 ,  G06F11/1407

    摘要： Embodiments include a controller apparatus, a computerized apparatus, a device, an apparatus, and a method. A controller-apparatus includes a monitoring circuit for detecting a computational error corresponding to an execution of an instruction of a sequence of instructions by a processor subsystem having an adjustable operating parameter. The controller apparatus also includes a recovery circuit for rolling back an execution of the sequence of instructions to a checkpoint in response to the detected computational error. The controller apparatus further includes a control circuit for adjusting the adjustable operating parameter in response to a performance criterion.

    摘要翻译： 实施例包括控制器装置，计算机化装置，装置，装置和方法。 控制器装置包括监测电路，用于通过具有可调操作参数的处理器子系统来检测与执行指令序列的指令相对应的计算误差。 控制器装置还包括一个恢复电路，用于响应于检测到的计算误差而将指令序列的执行回滚到检查点。 控制器装置还包括一个控制电路，用于响应于性能标准来调节可调整的操作参数。

    Handling processor computational errors
    7.
    发明申请
    Handling processor computational errors 失效
    处理处理器计算错误

    公开(公告)号：US20070050660A1

    公开(公告)日：2007-03-01

    申请号：US11364131

    申请日：2006-02-28

    申请人： Bran Ferren ,  W. Hillis ,  William Mangione-Smith ,  Nathan Myhrvold ,  Clarence Tegreene ,  Lowell Wood

    发明人： Bran Ferren ,  W. Hillis ,  William Mangione-Smith ,  Nathan Myhrvold ,  Clarence Tegreene ,  Lowell Wood

    IPC分类号： G06F11/00

    CPC分类号： G06F11/0793 ,  G06F11/0721 ,  G06F11/1407

    摘要： Embodiments include a computer processor-error controller, a computerized device, a device, an apparatus, and a method. A computer processor-error controller includes a monitoring circuit operable to detect a computational error corresponding to an execution of a second instruction by a processor operable to execute a sequence of program instructions that includes a first instruction that is fetched before the second instruction. The computer processor-error controller includes an error recovery circuit operable to restore an execution of the sequence of program instructions to the first instruction in response to the detected computational error.

    摘要翻译： 实施例包括计算机处理器 - 错误控制器，计算机化设备，设备，设备和方法。 计算机处理器错误控制器包括监视电路，其可操作以由处理器检测对应于执行第二指令的计算错误，所述处理器可操作以执行包括在所述第二指令之前获取的第一指令的程序指令序列。 计算机处理器错误控制器包括错误恢复电路，其可操作以响应于检测到的计算错误将程序指令序列的执行恢复到第一指令。

    Hardware-generated and historically-based execution optimization
    8.
    发明申请
    Hardware-generated and historically-based execution optimization 审中-公开
    硬件生成和基于历史的执行优化

    公开(公告)号：US20070050608A1

    公开(公告)日：2007-03-01

    申请号：US11292323

    申请日：2005-11-30

    申请人： Bran Ferren ,  W. Hillis ,  William Mangione-Smith ,  Nathan Myhrvold ,  Clarence Tegreene ,  Lowell Wood

    发明人： Bran Ferren ,  W. Hillis ,  William Mangione-Smith ,  Nathan Myhrvold ,  Clarence Tegreene ,  Lowell Wood

    IPC分类号： G06F9/44

    CPC分类号： G06F8/443 ,  G06F11/3466

    摘要： Embodiments include a device, and a method. In an embodiment, a device includes a processor operable to execute an instruction set, a communications link exposed to an execution-optimization synthesizer and to the processor, and the execution-optimization synthesizer. The execution-optimization optimization synthesizer includes an execution-optimization synthesizer operable to collect data from the communications link that corresponds to an execution of at least one instruction of the instruction set, and generate an execution-optimization information utilizing the collected data from the communications link and corresponding to the execution of at least one instruction of the instruction set.

    摘要翻译： 实施例包括装置和方法。 在一个实施例中，设备包括可操作以执行指令集，暴露给执行优化合成器的通信链路和处理器以及执行优化合成器的处理器。 执行优化优化合成器包括执行优化合成器，其可操作以从通信链路收集对应于指令集的至少一个指令的执行的数据，并且利用来自通信链路的所收集的数据生成执行优化信息 并且对应于指令集的至少一个指令的执行。