A programmable ROM block provided in an integrated circuit device includes a memory cell having a single-layer-gate structure in which a floating gate used in common as gates of a write/read transistor and an erase transistor is opposite to a control gate formed of an impurity layer through an insulating layer. The memory cell the cell was backward has a triple-well structure including a shallow well of a first conductivity type formed on a deep well of a second conductivity type, a ring-shaped shallow well of the second conductivity type which encloses the shallow well of the first conductivity type, and top impurity regions formed in the shallow well of the first conductivity type and the ring-shaped shallow well of the second conductivity type.