Invention Application
- Patent Title: Wiring structure of a semiconductor package and method of manufacturing the same, and wafer level package having the wiring structure and method of manufacturing the same
- Patent Title (中): 半导体封装的布线结构及其制造方法以及具有布线结构的晶片级封装及其制造方法
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Application No.: US11486041Application Date: 2006-07-14
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Publication No.: US20070069320A1Publication Date: 2007-03-29
- Inventor: In-Young Lee , Sung-Min Sim , Dong-Hyeon Jang , Hyun-Soo Chung , Jae-Sik Chung , Seung-Kwan Ryu , Myeong-Soon Park , Jong-Kook Yoon , Ju-Il Choi
- Applicant: In-Young Lee , Sung-Min Sim , Dong-Hyeon Jang , Hyun-Soo Chung , Jae-Sik Chung , Seung-Kwan Ryu , Myeong-Soon Park , Jong-Kook Yoon , Ju-Il Choi
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Priority: KR2005-76286 20050819
- Main IPC: H01L31/00
- IPC: H01L31/00

Abstract:
A wiring structure may include a pad, a conductive pattern and an insulating photoresist structure. The pad may be provided on a body and electrically connected to a circuit unit of the body. The conductive pattern may be provided on the body and may be electrically connected to the pad. The insulating photoresist structure may be provided on a surface of the conductive pattern. The insulating photoresist structure may have a contact hole through which the conductive pattern may be partially exposed. The insulating photoresist structure may be fabricated by providing a photosensitive photoresist film on the conductive layer, and patterning the photosensitive photoresist film by two photo processes.
Information query
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