发明申请
US20070075740A1 Dedicated Logic Cells Employing Configurable Logic and Dedicated Logic Functions
有权
专用逻辑单元采用可配置逻辑和专用逻辑功能
- 专利标题: Dedicated Logic Cells Employing Configurable Logic and Dedicated Logic Functions
- 专利标题(中): 专用逻辑单元采用可配置逻辑和专用逻辑功能
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申请号: US11539790申请日: 2006-10-09
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公开(公告)号: US20070075740A1公开(公告)日: 2007-04-05
- 发明人: Hare Verma , Ravi Sunkavalli , Manoj Gunwani , Elliott Delaye
- 申请人: Hare Verma , Ravi Sunkavalli , Manoj Gunwani , Elliott Delaye
- 申请人地址: US CA Santa Clara
- 专利权人: Velogix, Inc.
- 当前专利权人: Velogix, Inc.
- 当前专利权人地址: US CA Santa Clara
- 主分类号: H03K19/177
- IPC分类号: H03K19/177
摘要:
A dedicated logic cell in a programmable logic structure is described that comprises the following primary components: a configurable logic function or look-up table (LL), a dedicated logic function (DL), a sequential logic function (LS), and a control logic function (LC). In this illustration, the dedicated logic cell comprises two configurable logic functions, two sequential logic functions, a dedicate logic function, and a control logic function. In a first embodiment, the dedicated logic cell is constructed with a combination of configurable logic functions that are coupled to a dedicated logic function in order to perform a four 2-input function, an AND function, an OR function, or an NOR function. In a second embodiment, the dedicated logic cell is constructed with a combination of configurable logic functions that are coupled to a dedicated logic function in order to perform a four 2-to-1 multiplexer function. In a third embodiment, the dedicated logic cell is constructed with a plurality of configurable logic functions that operate as a two 6-input function with separate inputs. In a fourth embodiment, the dedicated logic cell is constructed with a combination of a configurable logic function with sequential logic functions that operate as a loadable, resettable, clearable shift register. In a fifth embodiment, the dedicated logic cell is constructed with a combination of configurable logic functions, a dedicated logic function, and sequential logic functions that operate as an accumulator.