发明申请
US20070079152A1 System and method for throttling memory power consumption 失效
用于节流内存功耗的系统和方法

System and method for throttling memory power consumption
摘要:
A power throttling method and system for a memory controller in a computer system comprising a power supply module including a plurality of bulk power supplies (“BPSs”) are described. In one embodiment, each of the at BPSs provides to a power output monitor a status signal indicative of a status thereof. Responsive to receipt of the status signals, the power output monitor determines whether a bulk power supply capacity is below system power requirements. Responsive to a positive determination, the power output monitor drives a throttle control signal to the memory controller to a level indicative of an over-threshold state.
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