发明申请
US20070113161A1 CASCADED RADIX ARCHITECTURE FOR HIGH-SPEED VITERBI DECODER
审中-公开
用于高速VITERBI解码器的CASCADED RADIX架构
- 专利标题: CASCADED RADIX ARCHITECTURE FOR HIGH-SPEED VITERBI DECODER
- 专利标题(中): 用于高速VITERBI解码器的CASCADED RADIX架构
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申请号: US11557208申请日: 2006-11-07
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公开(公告)号: US20070113161A1公开(公告)日: 2007-05-17
- 发明人: Srinivas Lingam , Seok-Jun Lee , Anuj Batra , Manish Goel
- 申请人: Srinivas Lingam , Seok-Jun Lee , Anuj Batra , Manish Goel
- 申请人地址: US TX Dallas 75265
- 专利权人: TEXAS INSTRUMENTS INCORPORATED
- 当前专利权人: TEXAS INSTRUMENTS INCORPORATED
- 当前专利权人地址: US TX Dallas 75265
- 主分类号: H03M13/03
- IPC分类号: H03M13/03
摘要:
A Viterbi decoder includes a branch metric unit for generating branch metrics between two states at two different time periods, a traceback unit, a traceback memory and an add-compare-select circuit. The add-compare-select circuit includes a plurality of cascaded add-compare-select sub-circuits, each add-compare-select sub-circuit calculating a path metric responsive to a plurality of branch metrics from the branch metric unit and a plurality of pre-calculated path metrics, where at least one of the add-compare-select sub-circuits receives a set of pre-calculated path metrics from another one of the add-compare-select sub-circuits.
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