发明申请
- 专利标题: Semiconductor Device Equipped with a Voltage Step-Up Circuit
- 专利标题(中): 配有升压电路的半导体器件
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申请号: US11669051申请日: 2007-01-30
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公开(公告)号: US20070122964A1公开(公告)日: 2007-05-31
- 发明人: Michio NAKAGAWA , Kazuo SATO , Hiromi UENOYAMA , Yasuyuki OHNISHI , Kazunori TORII
- 申请人: Michio NAKAGAWA , Kazuo SATO , Hiromi UENOYAMA , Yasuyuki OHNISHI , Kazunori TORII
- 申请人地址: JP Kyoto 615-8585
- 专利权人: ROHM CO., LTD.
- 当前专利权人: ROHM CO., LTD.
- 当前专利权人地址: JP Kyoto 615-8585
- 优先权: JP2002-031944 20020208; JP2002-042986 20020220; JP2002-099480 20020402
- 主分类号: H01L21/8238
- IPC分类号: H01L21/8238 ; H01L29/76
摘要:
A semiconductor device is equipped with a step-up circuit having a series of multiple charge pump units. Each of the units has a well separation type MOS transistor. The separation well of the transistor is coupled to a high potential so as to form double reverse biases between the N-type well and a P-type substrate and between the N-type well and a P-type well. This permits the threshold Vth of the MOS transistor to be held at low level. The units are provided with a clock whose current supply capability is limited until a predetermined condition (that a predetermined period of time has elapsed after the onset of the step-up circuit by a startup signal or that the output voltage has reached a predetermined level). This limitation of the clock facilitates suppression of power consumption by the step-up circuit during a startup, thereby reducing changes in amplitude of a supply voltage.
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