发明申请
- 专利标题： Semiconductor device
- 专利标题（中）： 半导体器件
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申请号： US11606979申请日： 2006-12-01
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公开(公告)号： US20070127178A1公开(公告)日： 2007-06-07
- 发明人: Takashi Yoneda
- 申请人： Takashi Yoneda
- 优先权： JP2005-347560 20051201
- 主分类号： H02H3/24
- IPC分类号： H02H3/24
摘要：
A memory voltage monitoring circuit generates a low voltage detection signal when a power supply voltage drops below a memory contents holding voltage. A reset circuit generates a reset signal from an external reset signal and outputs the reset signal to the memory voltage monitoring circuit as an operation permission/no-permission signal. The memory voltage monitoring circuit operates while the reset signal shows operation permission.
公开/授权文献
- US07479817B2 Semiconductor device 公开/授权日：2009-01-20
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