Invention Application
US20070133341A1 Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations
有权
组合非易失性存储器采用统一技术与字节,页面和块写入以及同步读写操作
- Patent Title: Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations
- Patent Title (中): 组合非易失性存储器采用统一技术与字节,页面和块写入以及同步读写操作
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Application No.: US11633334Application Date: 2006-12-04
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Publication No.: US20070133341A1Publication Date: 2007-06-14
- Inventor: Peter Lee , Fu-Chang Hsu , Hsing-Ya Tsao , Han-Rei Ma
- Applicant: Peter Lee , Fu-Chang Hsu , Hsing-Ya Tsao , Han-Rei Ma
- Assignee: Aplus Flash Technology, Inc.
- Current Assignee: Aplus Flash Technology, Inc.
- Main IPC: G11C7/10
- IPC: G11C7/10

Abstract:
A combination EEPROM and Flash memory is described containing cells in which the stacked gate transistor of the Flash cell is used in conjunction with a select transistor to form an EEPROM cell. The select transistor is made sufficiently small so as to allow the EEPROM cells to accommodate the bit line pitch of the Flash cell, which facilitates combining the two memories into memory banks containing both cells. The EEPROM cells are erased by byte while the Flash cells erased by block. The small select transistor has a small channel length and width, which is compensated by increasing gate voltages on the select transistor and pre-charge bitline during CHE program operation.
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