发明申请
US20070141787A1 METHOD FOR MANUFACTURING A VERTICAL-GATE MOS TRANSISTOR WITH COUNTERSUNK TRENCH-GATE
有权
具有反激式TRENCH-GATE的垂直栅MOS晶体管的制造方法
- 专利标题: METHOD FOR MANUFACTURING A VERTICAL-GATE MOS TRANSISTOR WITH COUNTERSUNK TRENCH-GATE
- 专利标题(中): 具有反激式TRENCH-GATE的垂直栅MOS晶体管的制造方法
-
申请号: US11558283申请日: 2006-11-09
-
公开(公告)号: US20070141787A1公开(公告)日: 2007-06-21
- 发明人: Marco Annese , Pietro Montanini , Riccardo Depetro
- 申请人: Marco Annese , Pietro Montanini , Riccardo Depetro
- 申请人地址: IT Agrate Brianza 20041
- 专利权人: STMICROELECTRONICS S.R.L.
- 当前专利权人: STMICROELECTRONICS S.R.L.
- 当前专利权人地址: IT Agrate Brianza 20041
- 优先权: ITMI2005A002140 20051110
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
A method manufactures a vertical-gate MOS transistor integrated in a semiconductor chip having a main surface. The method includes: forming a trench gate extending into the chip from the main surface to a gate depth, by forming a control gate and an insulation layer for insulating the control gate from the chip. Forming the trench gate includes: forming a trench extending into the chip from the main surface to a protection depth less than the gate depth, the trench having a lateral wall and a bottom wall with an edge portion of the lateral wall extending from the main surface being inclined outwardly with respect to the remaining portion of the lateral wall; forming a first auxiliary insulation layer in the trench; removing a bottom wall of the first auxiliary insulation layer; extending the trench to the gate depth; and forming a second auxiliary insulation layer in the trench.