发明申请
- 专利标题: Calibration circuit and semiconductor device incorporating the same
- 专利标题(中): 校准电路和包含其的半导体器件
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申请号: US11580902申请日: 2006-10-16
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公开(公告)号: US20070143052A1公开(公告)日: 2007-06-21
- 发明人: Hiroki Fujisawa , Hideyuki Yoko
- 申请人: Hiroki Fujisawa , Hideyuki Yoko
- 专利权人: ELPIDA MEMORY, INC
- 当前专利权人: ELPIDA MEMORY, INC
- 优先权: JP2005-301717 20051017
- 主分类号: G06F19/00
- IPC分类号: G06F19/00
摘要:
Impedance adjusting transistors are once inactivated on every occasion of changing an impedance adjusting code. After restoring the potential to an initially set potential by once inactivating the impedance adjusting transistors, the state of the transistors is switched according to the impedance adjusting code. By starting the potential from the initially set potential at the time of switching the state of the transistors, no switching noise is generated. Since no switching noise is generated, a comparator always carries out stable comparison and judgment and thus there is obtained a calibration circuit that ensures stable outputs.
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