发明申请
- 专利标题： System and method for reducing store latency
- 专利标题（中）： 减少存储延迟的系统和方法
-
申请号： US11311751申请日： 2005-12-19
-
公开(公告)号： US20070143549A1公开(公告)日： 2007-06-21
- 发明人: Bratin Saha , Hariharan Thantry , Ali-Reza Adl-Tabatabai
- 申请人： Bratin Saha , Hariharan Thantry , Ali-Reza Adl-Tabatabai
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 主分类号： G06F12/00
- IPC分类号： G06F12/00
摘要：
According to one embodiment of the invention, a method comprises verifying that a cache block is not exclusively owned, and if not, transmitting a message identifying both the cache block and a caching agent requesting ownership of the cache block to a broadcast interconnect.
公开/授权文献
- US07606981B2 System and method for reducing store latency 公开/授权日：2009-10-20
信息查询
