Invention Application
US20070145495A1 Method of fabricating a MOSFET transistor having an anti-halo for modifying narrow width device performance
审中-公开
制造具有用于改变窄宽度器件性能的抗卤素的MOSFET晶体管的方法
- Patent Title: Method of fabricating a MOSFET transistor having an anti-halo for modifying narrow width device performance
- Patent Title (中): 制造具有用于改变窄宽度器件性能的抗卤素的MOSFET晶体管的方法
-
Application No.: US11319815Application Date: 2005-12-27
-
Publication No.: US20070145495A1Publication Date: 2007-06-28
- Inventor: Giuseppe Curello , Sivakumar Mudanai , Nick Lindert , Leonard Pipes , M. Shaheed , Sunit Tyagi
- Applicant: Giuseppe Curello , Sivakumar Mudanai , Nick Lindert , Leonard Pipes , M. Shaheed , Sunit Tyagi
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/336
Abstract:
A method including forming a transistor structure structure comprising a gate electrode over an active region of a substrate, the active region defined by a trench isolation structure and changing a performance of a narrow width transistor with respect to a wide width transistor by introducing a dopant into the active region adjacent an interface defined by the trench isolation structure and the gate electrode. A structure including a gate electrode formed on a substrate, an active region adjacent an interface defined by a trench isolation structure and a gate electrode and an implant within the active region to change a performance of a transistor.
Information query
IPC分类:
