An integrated circuit device includes a common transceiver macrocell including a circuit necessary for host operation and a circuit necessary for device operation. The common transceiver macrocell includes an analog front-end circuit and a high-speed logic circuit. The high-speed logic circuit includes a parallel/serial conversion circuit, a first parallel interface which serves as an interface between an external circuit and the parallel/serial conversion circuit, a sampling clock generation circuit, a serial/parallel conversion circuit, and a second parallel interface which serves as an interface between the serial/parallel conversion circuit and the external circuit.