发明申请
US20070171731A1 Leakage mitigation logic 有权
泄漏缓解逻辑

  • 专利标题: Leakage mitigation logic
  • 专利标题(中): 泄漏缓解逻辑
  • 申请号: US11300599
    申请日: 2005-12-15
  • 公开(公告)号: US20070171731A1
    公开(公告)日: 2007-07-26
  • 发明人: Simon FordDavid Howard
  • 申请人: Simon FordDavid Howard
  • 申请人地址: GB Cambridge
  • 专利权人: ARM Limited
  • 当前专利权人: ARM Limited
  • 当前专利权人地址: GB Cambridge
  • 主分类号: G11C7/10
  • IPC分类号: G11C7/10
Leakage mitigation logic
摘要:
Leakage current from a circuit for handling data is reduced using leakage control circuit operable in a leakage reduction mode. The data handling circuit comprises data handling logic operable to receive an input data value and to output and output data value. The data handling circuit also comprises a latch operable to latch the output data value in response to a clock signal having a clock period. Both the leakage control circuitry and the latch are controlled dependent upon the same clock signal and the leakage control circuitry is controlled such that it is in a leakage reduction mode for a time less than the clock period. This approach enables leakage reduction to be provided in circuits which are still operational and is particularly suited to data handling circuits that employ frequency scaling.
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