Apparatuses and methods for analyzing semiconductor workpieces are disclosed herein. In one embodiment, for example, an apparatus for analyzing a semiconductor workpiece includes a first metrology unit configured to measure photoluminescence from the workpiece and a second metrology unit configured to determine a topographical profile of the workpiece. The apparatus can further include a control unit operatively coupled to the first metrology unit and the second metrology unit to receive and associate data regarding the photoluminescence and the topographical profile to produce an integrated map of the workpiece. The apparatus may have several different configurations. In one embodiment, for example, the first metrology unit and the second metrology unit can be housed in a single tool. In other embodiments, the first metrology unit and the second metrology unit may be in separate tools.