发明申请
- 专利标题: Signal peak voltage suppression apparatus
- 专利标题(中): 信号峰值电压抑制装置
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申请号: US11443072申请日: 2006-05-31
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公开(公告)号: US20070195909A1公开(公告)日: 2007-08-23
- 发明人: Hiroyoshi Ishikawa , Hajime Hamada , Kazuo Nagatani , Nobukazu Fudaba , Tokuro Kubo
- 申请人: Hiroyoshi Ishikawa , Hajime Hamada , Kazuo Nagatani , Nobukazu Fudaba , Tokuro Kubo
- 专利权人: FUJITSU LIMITED
- 当前专利权人: FUJITSU LIMITED
- 优先权: JP2006-040697 20060217
- 主分类号: H04B15/00
- IPC分类号: H04B15/00
摘要:
As in a conventional technology, a hard clipping process and a filtering process are performed on a transmission signal. An original transmission signal is subtracted from a signal on which the processes have been performed, and an inverse sign signal to the suppressed signal is retrieved. By giving a gain to the signal, and adding up to the original transmission signal, a peak voltage is suppressed. The gain can be a ratio of a difference signal between a hard clipped signal and an original transmission signal to a signal of suppression of a filtered signal from the original transmission signal, or a value determined by a simulation depending on the cutoff frequency of a low pass filter used in the filtering process.
公开/授权文献
- US07756216B2 Signal peak voltage suppression apparatus 公开/授权日:2010-07-13
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