发明申请
- 专利标题： Apparatus and methods for adjusting performance of programmable logic devices
- 专利标题（中）： 用于调节可编程逻辑器件性能的装置和方法
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申请号： US11361642申请日： 2006-02-24
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公开(公告)号： US20070200596A1公开(公告)日： 2007-08-30
- 发明人: Andy Lee , Christopher Lane , Ketan Zaveri , Richard Cliff , Cameron McClintock , Srinivas Reddy , David Lewis
- 申请人： Andy Lee , Christopher Lane , Ketan Zaveri , Richard Cliff , Cameron McClintock , Srinivas Reddy , David Lewis
- 主分类号： H03K19/177
- IPC分类号： H03K19/177
摘要：
A programmable logic device (PLD) includes at least two regions. Each region includes electrical circuitry that has a set of transistors. Each of the two regions has a corresponding fixed transistor threshold voltage, a corresponding fixed transistor body bias, and a corresponding fixed supply voltage.