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    PROCESS FOR THE PREPARATION OF CARVEDILOL DIHYDROGEN PHOSPHATE HEMIHYDRATE AND PHARMACEUTICAL COMPOSITIONS THEREOF
    2.
    发明申请
    PROCESS FOR THE PREPARATION OF CARVEDILOL DIHYDROGEN PHOSPHATE HEMIHYDRATE AND PHARMACEUTICAL COMPOSITIONS THEREOF 审中-公开
    制备卡维地洛二羟基磷酸氢盐和其药物组合物的方法

    公开(公告)号：US20090111998A1

    公开(公告)日：2009-04-30

    申请号：US12257775

    申请日：2008-10-24

    Applicant: Srinivas Reddy Gade ,  Srinivas Reddy Mallepalli

    Inventor： Srinivas Reddy Gade ,  Srinivas Reddy Mallepalli

    IPC: C07F9/02

    CPC classification number: C07D209/88

    Abstract: There is provided processes for preparing carvedilol dihydrogen phosphate hemihydrate, which processes include at least one of the steps of: (a) providing a solution of carvedilol in a mixture of organic solvent (s) and/or water; (b) adding a phosphonating agent to the reaction mixture of step (a); and (c) further processing to obtain carvedilol dihydrogen phosphate hemihydrate. There is also provided pharmaceutical compositions comprising carvedilol dihydrogen phosphate hemihydrate and processes for their preparation.

    Abstract translation: 提供了制备卡维地洛二磷酸盐半水合物的方法，该方法包括以下步骤中的至少一个步骤：（a）在有机溶剂和/或水的混合物中提供卡维地洛的溶液; （b）向步骤（a）的反应混合物中加入膦酸化剂; 和（c）进一步处理以获得卡维地洛磷酸二氢钠半水合物。 还提供了包含卡维地洛磷酸二氢二水合物的药物组合物及其制备方法。

    Peak current controlled switching voltage regulator system and method for providing a self power down mode
    7.
    发明授权
    Peak current controlled switching voltage regulator system and method for providing a self power down mode 有权
    峰值电流控制开关稳压器系统和提供自省电模式的方法

    公开(公告)号：US08922191B2

    公开(公告)日：2014-12-30

    申请号：US13167013

    申请日：2011-06-23

    Applicant: Prasad Sawarkar ,  Srinivas Reddy Chokka

    Inventor： Prasad Sawarkar ,  Srinivas Reddy Chokka

    IPC: H02M3/156 ,  H02M1/36

    CPC classification number: H02M1/36 ,  Y10S323/901

    Abstract: A peak current controlled switching voltage regulator system and method for providing a self-power down mode. An on-chip voltage regulator integrated into an on-chip digital logic circuit provides a core supply voltage to the on-chip digital logic circuit along with an off-chip inductor. An off-chip regulator connected to the on-chip digital logic circuit provides an external core supply voltage with respect to the on-chip digital logic circuit. A start-up circuit operates the on-chip voltage regulator in a self-power down mode for a pre-determined time period when the on-chip regulator is not connected to the off-chip inductor in order to maintain an equilibrium voltage supply with respect to the on-chip digital logic circuit.

    Abstract translation: 一种用于提供自省电模式的峰值电流控制开关电压调节器系统和方法。 集成在片上数字逻辑电路中的片上稳压器为片上数字逻辑电路提供核心电源电压以及片外电感。 连接到片上数字逻辑电路的片外调节器提供相对于片上数字逻辑电路的外部核心电源电压。 启动电路在片上稳压器未连接到片外电感器的情况下以预定时间段在自耗功率模式下操作片上稳压器，以便保持平衡电压供应 相对于片上数字逻辑电路。

    Mobile business client
    8.
    发明授权
    Mobile business client 有权
    移动业务客户端

    公开(公告)号：US08537985B2

    公开(公告)日：2013-09-17

    申请号：US13306197

    申请日：2011-11-29

    Applicant: Srinivas Reddy ,  Juergen Hagedorn ,  Martin Botschek

    Inventor： Srinivas Reddy ,  Juergen Hagedorn ,  Martin Botschek

    IPC: H04M1/64

    CPC classification number: G10L13/00

    Abstract: The subject matter herein relates to computer software and client-server based applications and, more particularly, to a mobile business client. Some embodiments include one or more device-agnostic application interaction models and one or more device specific transformation services. Some such embodiments provide one or more of systems, methods, and software embodied at least in part in a device specific transformation service to transform channel agnostic application interaction models to and from device or device surrogate specific formats.

    Abstract translation: 本文的主题涉及计算机软件和基于客户机 - 服务器的应用，更具体地涉及移动商务客户端。 一些实施例包括一个或多个设备不可知应用交互模型和一个或多个设备特定转换服务。 一些这样的实施例提供至少部分地体现在设备特定转换服务中的系统，方法和软件中的一个或多个，以将信道不可知应用交互模型转换到设备或设备替代特定格式。

    Bit allocation for encoding track information
    9.
    发明授权
    Bit allocation for encoding track information 有权
    用于编码轨道信息的位分配

    公开(公告)号：US08502706B2

    公开(公告)日：2013-08-06

    申请号：US10741304

    申请日：2003-12-18

    Applicant: Naveen Kumar Vandanapu ,  Srinivas Reddy Bhavanam

    Inventor： Naveen Kumar Vandanapu ,  Srinivas Reddy Bhavanam

    IPC: H03M7/00

    CPC classification number: G10L19/107 ,  H03M7/30

    Abstract: Allocating bits in an encoding scheme to reduce the number of bits required to send starting track information. In one embodiment a joint starting track indicator is sent with a frame to indicate the starting tracks for all subframes in the frame.

    Abstract translation: 在编码方案中分配比特以减少发送起始轨道信息所需的比特数。 在一个实施例中，联合起始轨迹指示符与帧一起发送，以指示帧中所有子帧的起始轨迹。

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